About Incyte

Incyte was incorporated in December of 1996 with a focus on providing IC physical design and CAD engineering services. Each member of the Incyte team brings 20 plus years of IC design experience to the company. This vast experience has enabled the Incyte team to successfully implement countless chip layouts including SoC, ASIC, custom high speed digital, mixed signal, analog, and RF based designs. A strong background in both IC implementation and CAD engineering enables our team to deliver solid design methodologies and flow automation as well as layout execution. 

Principals

Donald E. Garrett: Serving as president and physical design engineer, Mr. Garrett has been involved in IC physical design since 1979. Prior to co-founding Incyte in 1996, Mr. Garrett worked for Tseng Labs, Intel, GE Semiconductor, and RCA Solid State. With experience spanning the spectrum of IC layout Mr. Garrett’s recent interest has been in SoC/ASIC design methodology and flow automation. Mr. Garrett holds a BS in computer engineering (Magna cum Laude) from The College of New Jersey and is a senior member of the IEEE.
Resume & Capability Summary - Link Coming Soon!

Cheryl E. Smith: In her position as an IC physical design specialist, Ms. Smith has led Incyte’s custom IC layout effort since co-founding the company in 1996. While Ms. Smith has significant experience in ASIC development her focus is custom layout, layout verification, and custom layout acceleration tools. She has been involved in IC physical design since 1984. Prior to Incyte Ms. Smith worked for Tseng Labs, Intel, and RCA Solid State. Ms. Smith holds an AAS in computer graphics technology from Alfred State College and is a member of the IEEE.
Resume & Capability Summary - Link Coming Soon!

Associates

Hayagriv (Hy) Rao: Mr. Rao has functioned as technical lead of circuit design for Incyte since the company's inception in 1996. Working in IC circuit design since 1981, Mr. Rao is experienced in CMOS, BiCMOS, Bipolar and GaAs technologies. A sample of Mr. Rao's work would include high speed digital, A/D converters, D/A converters, and memory circuits. Prior to his efforts with Incyte Mr. Rao was employed by Intel, Tachonics, ITT, and Fairchild Semiconductor. Mr. Rao holds MEngEE and BSEE degrees from Cornell University and is a senior member of the IEEE.

Robert E. Servilio: Mr. Servilio joined the Incyte team in mid 2008 bringing front-end digital design expertise to the company. Mr. Servilio's experience includes architecture definition, RTL coding, logic synthesis, and design verification. Mr. Servilio has worked on ASIC, FPGA, circuit boards and complex subsystems, both commercial and military. His past employers include Bell Labs, Lucent, and the wireless division of Tyco Electronics (M/A-COM). Mr. Servilio holds an MSEE from Stanford University and a BSEE from Rutgers University.

Warren F. Szczypiorski: Mr. Szczypiorski began working with Incyte in 2004. In his duties as a custom IC layout designer, Mr. Szczypiorski brings over 30 years of experience to the company. Mr. Szczypiorski's previous employers include ATI Technologies, AT&T, Commodore Computer, Integrated Circuit Systems, MOS Technology, and General Instrument.